SilMinds is an Egyptian startup IP design house that is specialized
in Computer Arithmetic. SilMinds is expanding and seekingthe following
Digital Design Engineer [Job Code : HW-T15]
Designing arithmetic and processing circuits for FPGA co-processors.
The role include analysis, RTL coding, functional simulation and debugging.
- B.Sc. in Electronics and Communication or Computer Engineering,
M.Sc.is a plus.
- Experience of 0~3 years.
- Strong Digital Design background.
- Prior experience in RTL coding using VHDL (Verilog is a plus).
- Familiarity with any EDA tool (Quartus-II, Modelsim, Xilinx ISE, Synopsys DC, ..).
- Knowledge of Computer Arithmetic (Graduate Class)
- Knowledge of Computer Architecture (Graduate Class)
- TCL scripts
- Linux and bash scripting
- Ability to model a system using Matlab/C/C++
Please verify that your skills fulfill the basic qualifications before sending your CV.
Please mention the job code in the subject of the e-mail.
Please do not send your CV after 11 April, 2012.
Please send your CV to: tarek [dot] eldeeb [at] the employer company [dot] com